Title

Ferroelectric Hf0.5Zr0.5O2: ’Negative Capacitance’ and Wake-Up Effect

Date of Award

Fall 10-1-2021

Document Type

Dissertation

Degree Name

Doctor of Philosophy (PhD)

Department

Electrical Engineering (ENAS)

First Advisor

Ma, T. P.

Abstract

Ferroelectricity has been studied for more than a century since its discovery in 1920. The unique feature of two spontaneous polarization states making ferroelectric materials favorable for semiconductor memory and several ferroelectric materials have been commercialized, including Lead zirconate titanate (PZT), Strontium Bismuth Tantalate (SBT), and barium titanate (BTO). Commercial FeRAM memory has been used in low-power microcontrollers and other embedded applications. However, due to the scaling and process compatibility issues, ferroelectric memory never becomes a mainstream memory technology. In 2011, Hf-based ferroelectric materials are discovered. The promising scalability and CMOS-friendly fabrication process making Hf-based ferroelectrics a potential game-changer for ferroelectric memory. However, despite the advantages, Hf-based ferroelectric materials have several critical reliability problems which trouble the researchers and engineers. Among them, one important problem is the pristine antiferroelectric (AFE) state and the wake-up effect. The AFE state has no memory effect so a wake-up cycle is required to restore the ferroelectricity. This additional process is not desired for memory applications. Understanding the mechanisms behind the formation of the AFE state and the wake-up effect is essential to solving the issue. As CMOS scaling approaches the theoretical limit, extending Moore’s Law becomes increasingly difficult. Thus, innovations in transistor structures and materials are essential for the semiconductor industry. One requirement for the next-generation transistors is the low subthreshold swing (SS) because transistors with lower SS are more power-efficient. However, theoretically, the SS of traditional MOSFETs can not be below 60mV/dec. In 2008, researchers proposed that adding a layer of ferroelectric material to the gate of a MOSFET could achieve sub-60 mV/dec SS. They claimed that the capacitanceof the ferroelectric layer could be negative under certain conditions (known as negativecapacitance, NC), which is the key to the low SS of the transistor. Since then, hundreds of papers about this topic have been published. Despite several reported pieces of evidence, the theoretical foundation of the ferroelectric NC theory is not solid, and some of the reported experimental evidence is not persuasive. In this thesis, ferroelectric NC effects and the wake-up effect of HZO are thoroughly investigated. For the ’quasi-static negative capacitance’ (QSNC) theory, we first discuss the problems in the theory. Then, we conduct experiments to verify some important predictions of the theory. The inconsistencies between the theoretical predictions and the experimental results suggest that the QSNC theory has critical flaws. Then, we study the NC effects observed in the pulse measurements of some ferroelectric-based circuits. Through numerical simulation and experiment, we show that ferroelectric switching behavior is the reason for these apparent NC effects. At last, we show that the formation of the AFE pristine state of HZO is due to charge trapping, and the wake-up effect by field cycling is to remove the trapped charge. The experimental methods used in this work, including P-V, C-V, pulse measurement, endurance and retention characterizations, as well as the detail of numerical simulation are also introduced in this thesis.

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